SiFive has announced its second generation of IP Intelligence for RISC-V processors, positioning itself as a solid alternative for artificial intelligence (AI) applications from the far edge and the Internet of Things (IoT) to the data center. This new family of processors includes five models: the new X160 Gen 2 and X180 Gen 2, along with the X280 Gen 2, X390 Gen 2, and XM Gen 2 updates. These processors promise to refine scalar, vector, and, in the XM case, matrix computing, with immediate availability for licensing and expectations that the first silicon will be available in the second quarter of 2026.
The presentation takes place in a context of growing demand for AI solutions, with forecasts that workloads will increase by at least 20% across all technology sectors, and an impressive 78% specifically in edge AI. SiFive's strategy underscores the potential of RISC-V as a customizable alternative, capable of scaling from microcontrollers with narrow vectors to matrix clusters for high-performance AI and high-performance computing (HPC).
The X100 series, consisting of the X160 Gen 2 and X180 Gen 2 models, is designed for far-edge and IoT applications, with a focus on energy efficiency and a compact footprint. These versions are aimed at sectors such as automotive, autonomous robotics, industrial applications, and smart IoT. On the other hand, the X280 Gen 2 and X390 Gen 2 models improve performance by increasing the width of their vectors and optimizing bandwidth.
The XM Gen 2 model specializes in matrix processing, essential for deep neural networks and transformer tasks, and is designed to deliver high performance through its ability to run multiple instances within the same chip. All cores of the X series act as accelerator control units (ACU), integrating with external accelerators and simplifying software orchestration while enabling customers to focus on data pipeline innovation.
From an architectural standpoint, this generation incorporates significant improvements such as a memory-latency-tolerance system and a more efficient cache hierarchy. A new non-inclusive cache approach helps maximize the use of the memory area and optimize complex operations such as softmax with a per-hardware exponential unit.
The Intelligence Gen 2 family is also distinguished by its modularity and flexibility. The tunable vectorization options and the ability to operate as an ACU facilitate integration with technologies from other manufacturers, which could be especially attractive for companies that design their own chips.
SiFive's software, backed by support for new profiles and data types, promises to provide a unified solution that spans from the edge to the data center. The early adoption by two major semiconductor companies in the United States strengthens the potential of the X100 in applications ranging from accelerator control to autonomous vector acceleration.
With the promise of a mature software stack and the exhibition of its advances at the AI Infra Summit, SiFive seeks to reaffirm itself as a leader in RISC-V technology, offering a more flexible and efficient platform for AI development. The industry will observe how these advances materialize by 2026, evaluating their impact on the development of comprehensive AI solutions.
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